Encoding apparatus and the method

ABSTRACT

An encoding apparatus adds delay time information DTI indicating initial delay time i_d and delay time d of each group data to a position to be read prior to frame data by a decoding apparatus in the group data of encoding stream data DBI and transmits the same to the decoding apparatus  3.  Namely, the encoding apparatus does not transmit initial offset delay time i_of to the decoding apparatus  3.  The encoding apparatus starts to read and transmit the encoding stream data DBI from a transmission buffer at a predetermined bit rate R at timing designated by the initial offset delay time i_of.

CROSS REFERENCE TO RELATED APPLICATIONS

The present application is a Continuation Application of U.S.application Ser. No. 10/536,022, filed Jan. 19, 2006, which isincorporated herein by reference in its entirety and is the NationalStage of PCT/JP2003/15257, filed Nov. 28, 2003, and claims the benefitof priority of Japanese Application Nos. JP 2002-349287, filed Nov. 29,2002, and JP 2002-356054, filed Dec. 6, 2002.

TECHNICAL FIELD

The present invention relates to an encoding apparatus and the methodhaving a characteristic in a method of managing buffers.

BACKGROUND ART

There are systems for providing content data, such as encoded video dataand audio data, by transmitting to decoding apparatuses via a network,etc.

An encoding apparatus of such systems writes encoded data to atransmission buffer and, after a predetermined initial offset delaytime, reads the content data from the transmission buffer so as totransmit to an encoding apparatus.

On the other hand, it starts by decoding.

A control circuit 11 suspends reading of encoding stream data DBI from atransmission buffer E_BUF until timing ti(3) that frame data f(3) iswritten to the transmission buffer E_BUF, when a data amount stored inthe transmission buffer E_BUF becomes 0 at timing te(2) shown in FIG. 2.

Also, the control circuit 11 adds to the content data delay timeinformation indicating an overflow and underflow, initial delay timeuntil starting of the reading, and timing of reading respective framedata composing the content data from a receiving buffer and transmitsthe same to a receiving buffer D_BUF of a decoding apparatus 3.

A conventional encoding apparatus designates the above initial delaytime by assuming that starting timing of the above initial offset delaytime is 0. Therefore, the encoding apparatus adds the initial offsetdelay time information other than the above delay time information tothe content data and transmits the same to the decoding apparatus.

However, in the above conventional system, since the initial offsetdelay time information is added to the content data, there is a problemthat a step for the adding processing arises and a load on processing ofthe encoding apparatus is heavy.

Also, by adding the initial offset delay time information, there is aproblem that an information amount of the content data becomes large.

The present invention was made in consideration of the above relatedarts and has as an object thereof to provide an encoding apparatus andthe method capable of reducing a processing load on the encodingapparatus and reducing a communication amount at a time.

Also, an object of the present invention is to provide an encodingapparatus and the method capable of reducing a memory capacity requiredby a memory means for decoding.

DISCLOSURE OF THE INVENTION Brief Description of Drawings

To attain the above object, a first aspect of the invention is anencoding apparatus, including an encoder for generating a plurality ofencoding data to be decoded in a predetermined order, a memory forstoring the encoding data generated by the encoder, and a control forreading the encoding data from the memory and transmitting to a decodingdestination; wherein the control determines a first delay time fromwriting the encoding data being first on the decoding order among theplurality of encoding data generated by the encoder until reading andtransmitting the same to the decoding destination, determines a seconddelay time from receiving the encoding data being first on the decodingorder among the plurality of encoding data at the decoding destinationto decoding of the first encoding data, transmits delay time informationindicating the second delay time to the decoding destination, andtransmits the first encoding data being first on the decoding order tothe decoding destination based on the determined first delay time.

Further, a second aspect of the invention is an encoding apparatus,including an encoder for generating a plurality of encoding data to bedecoded in a predetermined order, a memory for storing the encoding datagenerated by the encoder, and a control for transmitting the encodingdata read from the memory together with information for designatingtiming of decoding the encoding data at a decoding destination to thedecoding destination; wherein the control suspends reading of theencoding data from the memory before a data amount of the encoding datastored in the memory becomes 0 and, after a predetermined suspensionperiod, reads the encoding data from the memory to resume an operationof transmitting to the decoding destination.

Further, a third aspect of the invention is an encoding method,including first determining a first delay time from writing encodingdata being first on the decoding order among a plurality of encodingdata to a memory until reading and transmitting the same to a decodingdestination, second determining a second delay time from receiving thefirst encoding data among the plurality of encoding data at the decodingdestination until decoding of the first encoding data, and atransmitting delay time information indicating the second delay timedetermined in the second determining to the decoding destination andtransmitting the first encoding data on the decoding order to thedecoding destination based on the first delay time determined in thefirst determining.

Further, a fourth aspect of the present invention is an encoding method,including writing a plurality of encoding data to be decoded in apredetermined order to a memory, and reading the encoding data from thememory together with information for designating timing of decoding theencoding data at a decoding destination and transmitting the same to thedecoding destination; wherein the reading suspends reading of theencoding data from the memory before a data amount of the encoding datastored in the memory becomes 0 and, after a predetermined suspensionperiod, resumes reading of the encoding data from the memory.

FIG. 1 is a view of the overall configuration of a communication systemof a first embodiment of the present invention;

FIG. 2 is a view for explaining timing of video data EBI, encodingstream data DBI and video data DBO shown in FIG. 1;

FIG. 3 is a flowchart for explaining an operation of a control circuitof the encoding apparatus shown in FIG. 1;

FIG. 4 is a view for explaining limitation of a conventional encodingapparatus;

FIG. 5 is a view for explaining an operation of a control circuit of anencoding apparatus of a second embodiment of the present invention;

FIG. 6 is a view of the overall configuration of a communication systemof a third embodiment of the present invention; and

FIG. 7 is a view for explaining an operation of a control circuit of anencoding apparatus of a fourth embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

Below, a communication system according to embodiments of the presentinvention will be explained.

Embodiment 1

FIG. 1 is a view of the overall configuration of a communication system1 of a first embodiment of the present invention.

As shown in FIG. 1, the communication system 1 comprises, for example,an encoding apparatus 2 and a decoding apparatus 3.

The encoding apparatus 2 corresponds to an encoding apparatus of a firstinvention, and the decoding apparatus 3 corresponds to a decodingdestination of the present invention.

The encoding apparatus 2 generates encoding data DBI and transmits thesame to the decoding apparatus 3 via a network.

[Encoding Apparatus 2]

As shown in FIG. 1, the encoding apparatus 2 comprises, for example, anencoding circuit 10, a control circuit 11 and a transmission bufferE_BUF.

Here, the encoding circuit 10 corresponds to an encoding means of thefirst invention, the control circuit 11 corresponds to a control meansof the first invention, and the transmission buffer E_BUF corresponds toa memory means of the first invention.

The encoding circuit 10 generates, for example, encoded video data ENcomposed of a plurality of frame data and outputs the same to thecontrol circuit 11.

The video data EN is composed of, for example, group data respectivelyincluding a plurality of frame data.

In the present embodiment, as an example, the group data of the videodata EN is composed of 5 frame data f(0) to f(4).

The control circuit 11 writes as video data EBI the video data EN inputfrom the encoding circuit 10 to the transmission buffer E_BUF.

Also, the control circuit 11 designates initial offset delay time i_of,initial delay time i_d and delay time d for each of the group datacomposing the video data EN.

The control circuit 11 reads the video data EBI as encoding stream dataDBI from the transmission buffer E_BUF at timing designated by theinitial offset delay time i_of and transmits the same to the decodingapparatus 3.

Also, the control circuit 11 generates delay time information DTIindicating initial delay time i_d and delay time d of each of the framedata in the group data, adds the same to a position to be read first bythe decoding apparatus 3 in each group data, and transmits as encodingstream data DBI to the decoding apparatus 3 at timing shown in FIG. 2.

The initial delay time i_d indicates timing of reading the first framedata f(0) among the plurality of frame data belonging to the group datafrom the receiving buffer D_BUF of the decoding apparatus 3 to thedecoding circuit 14. Here, in the present embodiment, the delay time i_dis designated by assuming that timing of starting an operation ofwriting the first frame data of the group data in the video data EBI tothe transmission buffer E_BUF is 0 as shown in FIG. 2.

Also, delay time d(1) to d(4) indicate time from reading of previousframe data of the frame data in the decoding order from the receivingbuffer D_BUF till reading of the frame data from the receiving bufferD_BUF for the plurality of frame data belonging to the group data.

The control circuit 11 adds the delay time information DTI indicatinginitial delay time i_d and delay time d of each of the group data to aposition to be read prior to the frame data by the decoding apparatus 3in the group data of the encoding stream data DBI and transmits the sameto the decoding apparatus 3.

Namely, the control circuit 11 does not transmit the initial offsetdelay time i_of to the decoding apparatus 3.

The control circuit 11 starts reading of the encoding stream data DBIfrom the transmission buffer E_BUF at a predetermined bit rate R attiming designated by the initial offset delay time i_of as shown in FIG.2.

Then, the control circuit 11 suspends reading of the encoding streamdata DBI from the transmission buffer E_BUF until the timing ti(3) thatthe frame data f(3) is written to the transmission buffer E_BUF, when adata amount stored in the transmission buffer E_BUF becomes 0 at thetiming te(2) shown in FIG. 2.

Also, the control circuit 11 considers burst characteristics of theencoding stream data DBI to determine at least one of frame data initialoffset delay time i_of and initial delay time i_d so as not to cause anoverflow and underflow in the receiving buffer D_BUF of the decodingapparatus 3.

Below, an operation example of the encoding apparatus 2 shown in FIG. 1will be explained.

Step ST1:

The encoding circuit 10 generates, for example, encoded video data ENcomposed of a plurality of frame data and outputs the same to thecontrol circuit 11.

The control circuit 11 writes as video data EBI shown in FIG. 2 thevideo data EN to the transmission buffer E_BUF.

Step ST2:

The control circuit 11 determines initial offset delay time i_of ofgroup data to be processed composing the video data EBI.

Step ST3:

The control circuit 11 determines initial delay time i_d of the groupdata to be processed.

Step ST4:

The control circuit 11 determines delay time d of frame data belongingto the group data to be processed.

Step ST5:

The control circuit 11 determines whether delay time d is calculated forall frame data belonging to the group data to be processed and, whendetermined that the calculation is completed, proceeds to the step ST6,while when determined the calculation is not completed, performsprocessing of the step ST4 on yet to be calculated frame data.

Step ST6:

The control circuit 11 adds the delay time information DTI indicatingthe initial delay time i_d of the group data to be processed determinedin the step ST3 and the delay time d of all frame data belonging to thegroup data to be processed determined in the step ST4 to a position tobe read prior to the frame data by the decoding apparatus 3 in the groupdata of the encoding stream data DBI and transmits the same to thedecoding apparatus 3.

Namely, the control circuit 11 does not transmit the initial offsetdelay time i_of to the decoding apparatus 3.

Step ST7:

The control circuit 11 reads the frame data belonging to the group datato be processed from the transmission buffer E_BUF based on the initialoffset delay time i_of determined in the step ST2 and transmits the sameas encoding stream data DBI to the decoding apparatus 3.

As explained above, according to the communication system 1, theencoding apparatus 2 does not store the initial offset delay time i_ofin the delay time information DTI, so that an information amount to betransmitted from the encoding apparatus 2 to the decoding apparatus 3can be reduced.

[Decoding Apparatus 3]

As shown in FIG. 1, the decoding apparatus 3 comprises, for example, areceiving buffer D_BUF and a decoding circuit 14.

The decoding apparatus 3 writes video data DBI received from theencoding apparatus 2 to the receiving buffer D_BUF.

In the present embodiment, timing of reading encoding stream data DBIfrom the transmission buffer E_BUF of the encoding apparatus 2 andtiming of writing the same to the receiving buffer D_BUF of the decodingapparatus 3 are matched.

Based on the delay time information DTI of the respective group dataincluded in the encoding stream data EBI, the decoding circuit 14 readsframe data belonging to the group data to be processed from thetransmission buffer E_BUF as video data DBO and outputs to the decodingcircuit 14.

Namely, the decoding circuit 14 starts reading of the first frame dataf(0) of the above group data at timing designated by the initial delaytime i_d in the delay time information DTI, then, reads frame data f(1)to (4) from the receiving buffer D_BUF based on the delay time d(1) tod(4).

In the present embodiment, since the initial delay time i_d isdesignated by assuming that timing of starting writing of encodingstream data DBI to the receiving buffer D_BUF is 0, the decodingapparatus 3 can specify timing of starting reading of the first framedata f(0) of the group data without using the initial offset delay timei_of.

The decoding circuit 14 decodes the video data DBO read from thereceiving buffer D_BUF in unit of frame data.

Also, according to the communication system 1, as shown in FIG. 2, bydesignating the delay time i_d by assuming that timing of starting anoperation of writing the first frame data of the group data in the videodata EBI to the transmission buffer E_BUF is 0, the decoding apparatus 3can specify timing of reading the first frame data f(0) in the groupdata of the encoding stream data from the receiving buffer D_BUF basedon the delay time i_d indicated by the delay time information DTI.

Note that while the case of using single encoding apparatus 2 wasexplained as an example in FIG. 1, in the case of transmitting encodingstream data DBI from a plurality of encoding apparatuses 2 to singledecoding apparatus 3, the decoding apparatus 3 may decode preferentiallyfrom those having shorter initial delay time i_of among a plurality ofreceived encoding stream data DBI successively.

As a result, a highly responsive system can be realized.

Second Embodiment

For example, an encoding circuit 10 of the encoding apparatus 2 of thefirst embodiment explained above determines a data amount of the finalframe data f(4) on the decoding order belonging to the group data G(0)to be processed at timing of starting writing to the receiving bufferD_BUF of the final frame data on the decoding order belonging to asequential group data G(1) of the group data G(0) to be processed, asshown in FIG. 4, so that the frame data belonging to the group G(0) tobe processed is all read from the receiving buffer D_BUF to the decodingcircuit 14 (a data amount stored in the receiving buffer D_BUF becomes0).

The encoding apparatus 2 a in the present embodiment is the same as theencoding apparatus 2 in the first embodiment explained above except forthe points below.

Namely, the encoding circuit 10 a of the encoding apparatus 2 a of thepresent embodiment determines a data amount of the final frame data f(4)on the decoding order belonging to the group data G(0) to be processed,for example as shown in FIG. 5, without the limitation that all framedata belonging to the group G(0) to be processed is read from thereceiving buffer D_BUF to the decoding circuit 14 at timing of startingwriting to the receiving buffer D_BUF of the first frame data f(0) onthe decoding order belonging to the sequential group data G(1) of thegroup data G(0) to be processed.

Therefore, in the present embodiment, there are some cases where framedata belonging to the group G(0) to be processed remains in thereceiving buffer D_BUF at timing of starting to write to the receivingbuffer D_BUF of the first frame data f(0) on the decoding orderbelonging to the sequential group data G(1) of the group data G(0) to beprocessed.

As a result, the encoding circuit 10 a does not have to insert stuffingdata (for example, “0” data), which is not written to the receivingbuffer D_BUF and causes deterioration of picture quality, into framedata f(4) to be decoded last belonging to the group data G(0) to beprocessed. Consequently, picture quality of the decoded image inaccordance with the frame data f(4) can be improved.

Third Embodiment

FIG. 6 is a view of the overall configuration of a communication system1 b of the present embodiment.

As shown in FIG. 6, the communication system 1 b comprises, for example,an encoding apparatus 2 b and a decoding apparatus 3 b.

The encoding apparatus 2 b multiplexes video data DBI_V and audio dataDBI_A to generate encoding stream data STR and transmits the same to thedecoding apparatus 3 b.

The decoding apparatus 3 b demultiplexes the video data DBI_V and theaudio data DBI_A from the encoding stream data STR and decodes them,respectively.

[Encoding Apparatus 2]

As shown in FIG. 6, the encoding apparatus 2 comprises, for example, anencoding circuit 10V, a control circuit 11V, a transmission bufferE_BUF_V, encoding circuit 10A, a control circuit 11A, a transmissionbuffer E_BUF_A and a multiplexing circuit 30 (MUX).

The encoding circuit 10V and the transmission buffer E_BUF_V are thesame as the encoding circuit 10 and the transmission buffer E_BUF shownin FIG. 1 explained in the first embodiment, respectively.

Here, video data EN_V corresponds to the video data EN in the firstembodiment, video data EBI_V corresponds to the video data EBI in thefirst embodiment, and encoding stream data DBI_V corresponds to theencoding stream data DBI in the first embodiment.

The encoding circuit 10A generates encoded audio data EV_A.

The control circuit 11A and the transmission buffer E_BUF_A operate onaudio data in the same way as operations of the control circuit 11 andthe transmission buffer E_BUF on video data in the first embodiment.

In the present embodiment, the control circuit 11V, in addition to theoperation of the encoding circuit 10 in the first embodiment, outputsinformation i_of_D indicating initial offset delay time i_of to thecontrol circuit 11A.

Also, the encoding circuit 11V outputs delay time information DTIindicating initial delay time i_d and delay time d of respective framedata in the group data to the control circuit 11A.

The control circuit 11A determines initial offset delay time i_of_A ofvideo data audio data DBI_A, so that video encoding stream data DBI_Vand audio encoding stream data DBI_A are synchronized based on theinitial offset delay time i_of indicated by the information i_of_D inputfrom the control circuit 11V.

Then, the control circuit 11A reads from the transmission buffer E_BUF_Aframe data at the top of the group data in the encoding stream dataDBI_A based on the initial offset delay time i_of_A determined above,and outputs to the multiplexing circuit 30.

Also, the control circuit 11A generates audio delay time DTI_A (initialdelay time i_d_A) based on the video delay time DTI (initial delay timei_d) input from the control circuit 11V and adds the same to theencoding stream data DBI_A.

Also, the control circuits 11A and 11V may determine the transfer bitrate of the encoding stream data DBI_V and DBI_A, so that the encodingstream data DBI_V and DBI_A are synchronized.

Also, the control circuit 11A may determine a memory capacity requiredto store the encoding stream data DVI_A to the receiving buffer D_BUF_Aof the decoding apparatus 3 b based on at least one of the initialoffset delay time i_of_A and video delay time DTI input from the controlcircuit 11V, add information indicating the memory capacity and outputto the multiplexing circuit 30.

The multiplexing circuit 30 multiplexes the video encoding stream dataDBI_V input from the transmission buffer E_BUF_V and audio encodingstream data DBI_A input from the transmission buffer E_BUF_A to generateencoding stream data STR, and transmits the same to the decodingapparatus 3 b.

[Decoding Apparatus 3 b]

As shown in FIG. 6, the decoding apparatus 3 b comprises, for example, ademultiplexing circuit 31, a receiving buffer D_BUF_V, a decodingcircuit 14V, a receiving buffer D_BUF_A and a decoding circuit 14A.

A frame memory 31 demultiplexes the encoding stream data DBI_V and DVI_Afrom the encoding stream data STR, writes the encoding stream data DBI_Vto the receiving buffer D_BUF_V, and writes the encoding stream dataDBI_A to the receiving buffer D_BUF_A.

Here, the decoding circuit 14V reads from the receiving buffer D_BUF_Vvideo data DBO_V based on the delay time information DTI stored in theencoding stream data DVI_V and decodes the same.

Also, the decoding circuit 14A reads from the receiving buffer D_BUF_Aaudio data DBO_A based on the delay time information DTI_A stored in theencoding stream data DVI_A and decodes the same.

As explained above, according to the communication system 1 b of thepresent embodiment, even in the case of multiplexing video and audio fortransmitting, the same effects as those in the first embodiment can beobtained.

Also, according to the encoding apparatus 2 b, by providing informationi_of_D indicating initial offset delay time i_of generated by thecontrol circuit 11V and the delay time information DTI to the controlcircuit 11A, video and audio can be synchronized.

Fourth Embodiment

The encoding apparatus 2 c of the present embodiment is the same as theencoding apparatus 2 in the first embodiment shown in FIG. 1 except fora part of processing of the control circuit 11.

Below, different processing of the control circuit 11 c of the encodingapparatus 2 c of the present embodiment from that of the control circuit11 will be explained.

FIG. 7 is a view for explaining timing of encoding stream data DBIdesignated by the control circuit 11 c of the present embodiment.

As shown in FIG. 7, the control circuit 11 c suspends an operation oftransmitting the encoding stream data DBI to the decoding apparatus 3before a data amount of frame data stored in the receiving buffer D_BUFbecomes 0 and, after a predetermined suspension period STT, resumestransmission of the encoding stream data DBI to the decoding apparatus3.

Specifically, the control circuit 11 c starts to read the first framedata f(0) on the decoding order in the group data at reference timing“0” as shown in FIG. 7 and, when coming to timing tx that the reading iscompleted, suspends transmission of the encoding stream data DBI (areading operation from the transmission buffer E_BUF).

Then, the control circuit 11 c resumes transmission of the encodingstream data DBI at timing ty after a predetermined suspension periodSTT.

In the present embodiment, the timing ty is designated as timingimmediately before starting to decode the first frame data f(0) in theabove group data in the decoding circuit 14 of the decoding apparatus 3.

As explained above, according to the encoding apparatus 2 c, bydesignating the timing of the encoding stream data DBI as shown in FIG.7, a memory capacity required by the receiving buffer D_BUF of thedecoding apparatus can be reduced.

INDUSTRIAL APPLICABILITY

The present invention can be applied to an encoding system for managingbuffers.

EXPLANATION OF REFERENCES

2, 2C . . . encoding apparatus

3 . . . decoding apparatus

10, 10 a, 10V, 10A . . . encoding circuit

11, 11 c, 11V, 11A . . . control circuit

E_BUF, E_BUF_V, E_BUF_A . . . transmission buffer

D_BUF, D_BUF_V, D_BUF_A . . . receiving buffer

14, 14V, 14A . . . decoding circuit

1. An encoding method comprising steps of: encoding image data togenerate a bit stream; generating delay offset information indicatingdelay time from providing the bit stream to an encoder buffer untilproviding the bit stream to a decoder buffer; and transmitting the delayoffset information generated in said generating step and the bit streamgenerated in said encoding step.
 2. The encoding method of claim 1,wherein said transmitting step comprises transmitting the delay offsetinformation generated in said generating means by adding the delayoffset information into the bit stream generated in said encoding means.3. An encoding apparatus comprising: an encoding unit configured toencode image data to generate a bit stream; and a control unitconfigured to generate delay offset information indicating delay timefrom providing the bit stream to an encoder buffer until providing thebit stream to a decoder buffer, and transmit the delay offsetinformation and the bit stream.
 4. The encoding apparatus according toclaim 3, wherein the control unit is further configured to transmit thedelay offset information added into the bit stream.